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Regs

Reading register value from the inferior, and provides a standardized interface to registers like "sp" and "pc".

BitFlags = OrderedDict[str, Union[int, Tuple[int, int]]] module-attribute

aarch64 = RegisterSet(retaddr=('lr'), flags={'cpsr': aarch64_cpsr_flags}, extra_flags={'scr_el3': aarch64_scr_flags, 'sctlr': aarch64_sctlr_flags, 'sctlr_el2': aarch64_sctlr_flags, 'sctlr_el3': aarch64_sctlr_flags, 'spsr_el1': aarch64_cpsr_flags, 'spsr_el2': aarch64_cpsr_flags, 'spsr_el3': aarch64_cpsr_flags}, gpr=('x0', 'x1', 'x2', 'x3', 'x4', 'x5', 'x6', 'x7', 'x8', 'x9', 'x10', 'x11', 'x12', 'x13', 'x14', 'x15', 'x16', 'x17', 'x18', 'x19', 'x20', 'x21', 'x22', 'x23', 'x24', 'x25', 'x26', 'x27', 'x28', 'x29'), misc=('w0', 'w1', 'w2', 'w3', 'w4', 'w5', 'w6', 'w7', 'w8', 'w9', 'w10', 'w11', 'w12', 'w13', 'w14', 'w15', 'w16', 'w17', 'w18', 'w19', 'w20', 'w21', 'w22', 'w23', 'w24', 'w25', 'w26', 'w27', 'w28'), args=('x0', 'x1', 'x2', 'x3'), retval='x0') module-attribute

aarch64_cpsr_flags = BitFlags([('N', 31), ('Z', 30), ('C', 29), ('V', 28), ('Q', 27), ('PAN', 22), ('IL', 20), ('D', 9), ('A', 8), ('I', 7), ('F', 6), ('EL', (2, 2)), ('SP', 0)]) module-attribute

aarch64_scr_flags = BitFlags([('HCE', 8), ('SMD', 7), ('EA', 3), ('FIQ', 2), ('IRQ', 1), ('NS', 0)]) module-attribute

aarch64_sctlr_flags = BitFlags([('TIDCP', 63), ('SPINTMASK', 62), ('NMI', 61), ('EPAN', 57), ('ATA0', 43), ('ATA0', 42), ('TCF', (40, 2)), ('TCF0', (38, 2)), ('ITFSB', 37), ('BT1', 36), ('BT0', 35), ('EnIA', 31), ('EnIB', 30), ('EnDA', 27), ('UCI', 26), ('EE', 25), ('E0E', 24), ('SPAN', 23), ('TSCXT', 20), ('WXN', 19), ('nTWE', 18), ('nTWI', 16), ('UCT', 15), ('DZE', 14), ('EnDB', 13), ('I', 12), ('UMA', 9), ('SED', 8), ('ITD', 7), ('nAA', 6), ('CP15BEN', 5), ('SA0', 4), ('SA', 3), ('C', 2), ('A', 1), ('M', 0)]) module-attribute

amd64 = RegisterSet(pc='rip', stack='rsp', frame='rbp', flags=x86flags, gpr=('rax', 'rbx', 'rcx', 'rdx', 'rdi', 'rsi', 'r8', 'r9', 'r10', 'r11', 'r12', 'r13', 'r14', 'r15'), misc=('cs', 'ss', 'ds', 'es', 'fs', 'gs', 'fsbase', 'gsbase', 'ax', 'ah', 'al', 'bx', 'bh', 'bl', 'cx', 'ch', 'cl', 'dx', 'dh', 'dl', 'dil', 'sil', 'spl', 'bpl', 'di', 'si', 'bp', 'sp', 'ip'), args=('rdi', 'rsi', 'rdx', 'rcx', 'r8', 'r9'), retval='rax') module-attribute

arm = RegisterSet(retaddr=('lr'), flags={'cpsr': arm_cpsr_flags}, gpr=('r0', 'r1', 'r2', 'r3', 'r4', 'r5', 'r6', 'r7', 'r8', 'r9', 'r10', 'r11', 'r12'), args=('r0', 'r1', 'r2', 'r3'), retval='r0') module-attribute

arm_cpsr_flags = BitFlags([('N', 31), ('Z', 30), ('C', 29), ('V', 28), ('Q', 27), ('J', 24), ('T', 5), ('E', 9), ('A', 8), ('I', 7), ('F', 6)]) module-attribute

arm_xpsr_flags = BitFlags([('N', 31), ('Z', 30), ('C', 29), ('V', 28), ('Q', 27), ('T', 24)]) module-attribute

armcm = RegisterSet(retaddr=('lr'), flags={'xpsr': arm_xpsr_flags}, gpr=('r0', 'r1', 'r2', 'r3', 'r4', 'r5', 'r6', 'r7', 'r8', 'r9', 'r10', 'r11', 'r12'), args=('r0', 'r1', 'r2', 'r3'), retval='r0') module-attribute

i386 = RegisterSet(pc='eip', stack='esp', frame='ebp', flags=x86flags, gpr=('eax', 'ebx', 'ecx', 'edx', 'edi', 'esi'), misc=('cs', 'ss', 'ds', 'es', 'fs', 'gs', 'fsbase', 'gsbase', 'ax', 'ah', 'al', 'bx', 'bh', 'bl', 'cx', 'ch', 'cl', 'dx', 'dh', 'dl', 'di', 'si', 'bp', 'sp', 'ip'), retval='eax') module-attribute

iwmmxt = RegisterSet(retaddr=('lr'), flags={'cpsr': arm_cpsr_flags}, gpr=('r0', 'r1', 'r2', 'r3', 'r4', 'r5', 'r6', 'r7', 'r8', 'r9', 'r10', 'r11', 'r12'), args=('r0', 'r1', 'r2', 'r3'), retval='r0') module-attribute

mips = RegisterSet(frame='fp', retaddr=('ra'), gpr=('v0', 'v1', 'a0', 'a1', 'a2', 'a3', 't0', 't1', 't2', 't3', 't4', 't5', 't6', 't7', 't8', 't9', 's0', 's1', 's2', 's3', 's4', 's5', 's6', 's7', 's8', 'gp'), args=('a0', 'a1', 'a2', 'a3'), retval='v0') module-attribute

powerpc = RegisterSet(retaddr=('lr'), flags={'msr': BitFlags(), 'xer': BitFlags()}, gpr=('r0', 'r1', 'r2', 'r3', 'r4', 'r5', 'r6', 'r7', 'r8', 'r9', 'r10', 'r11', 'r12', 'r13', 'r14', 'r15', 'r16', 'r17', 'r18', 'r19', 'r20', 'r21', 'r22', 'r23', 'r24', 'r25', 'r26', 'r27', 'r28', 'r29', 'r30', 'r31', 'cr', 'ctr'), args=('r3', 'r4', 'r5', 'r6', 'r7', 'r8', 'r9', 'r10'), retval='r3') module-attribute

reg_sets = {'i386': i386, 'i8086': i386, 'x86-64': amd64, 'rv32': riscv, 'rv64': riscv, 'mips': mips, 'sparc': sparc, 'arm': arm, 'iwmmxt': iwmmxt, 'armcm': armcm, 'aarch64': aarch64, 'powerpc': powerpc} module-attribute

riscv = RegisterSet(pc='pc', stack='sp', retaddr=('ra'), gpr=('gp', 'tp', 't0', 't1', 't2', 's0', 's1', 'a0', 'a1', 'a2', 'a3', 'a4', 'a5', 'a6', 'a7', 's2', 's3', 's4', 's5', 's6', 's7', 's8', 's9', 's10', 's11', 't3', 't4', 't5', 't6'), args=('a0', 'a1', 'a2', 'a3', 'a4', 'a5', 'a6', 'a7'), retval='a0') module-attribute

sparc = RegisterSet(stack='sp', frame='fp', retaddr=('i7'), flags={'psr': BitFlags()}, gpr=('g1', 'g2', 'g3', 'g4', 'g5', 'g6', 'g7', 'o0', 'o1', 'o2', 'o3', 'o4', 'o5', 'o7', 'l0', 'l1', 'l2', 'l3', 'l4', 'l5', 'l6', 'l7', 'i0', 'i1', 'i2', 'i3', 'i4', 'i5'), args=('i0', 'i1', 'i2', 'i3', 'i4', 'i5'), retval='o0') module-attribute

x86flags = {'eflags': BitFlags([('CF', 0), ('PF', 2), ('AF', 4), ('ZF', 6), ('SF', 7), ('IF', 9), ('DF', 10), ('OF', 11)])} module-attribute

RegisterSet

all: Set[str] = set(misc) | set(flags) | set(extra_flags) | set(self.retaddr) | set(self.common) instance-attribute

args: Tuple[str, ...] = args instance-attribute

common: List[str] = [] class-attribute instance-attribute

emulated_regs_order: List[str] = [] instance-attribute

extra_flags = extra_flags instance-attribute

flags: Dict[str, BitFlags] = flags instance-attribute

frame: str | None = frame class-attribute instance-attribute

gpr: Tuple[str, ...] = gpr instance-attribute

misc: Tuple[str, ...] = misc instance-attribute

pc: str = pc instance-attribute

retaddr: Tuple[str, ...] = retaddr instance-attribute

retval: str | None = retval instance-attribute

stack: str = stack instance-attribute

__init__(pc='pc', stack='sp', frame=None, retaddr=(), flags={}, extra_flags={}, gpr=(), misc=(), args=(), retval=None)

__iter__()