Skip to content

Arm

`ARM_BIT_SHIFT_MAP: Dict[int, Callable[[int, int, int], int]] = {ARM_SFT_ASR: bit_math.arithmetic_shift_right, ARM_SFT_LSL: bit_math.logical_shift_left, ARM_SFT_LSR: bit_math.logical_shift_right, ARM_SFT_ROR: bit_math.rotate_right}` `module-attribute` ¶

`ARM_CAN_WRITE_TO_PC: Dict[int, Callable[[PwndbgInstruction], bool]] = {ARM_INS_ADD: first_op_is_pc, ARM_INS_SUB: first_op_is_pc, ARM_INS_SUBS: first_op_is_pc, ARM_INS_MOV: first_op_is_pc, ARM_INS_LDR: first_op_is_pc, ARM_INS_POP: ops_contain_pc, ARM_INS_LDM: ops_contain_pc}` `module-attribute` ¶

`ARM_EXCLUSIVE_STORE_INSTRUCTIONS = {ARM_INS_STREXB: 1, ARM_INS_STREXH: 2, ARM_INS_STREX: 4}` `module-attribute` ¶

`ARM_MATH_INSTRUCTIONS = {ARM_INS_ADD: '+', ARM_INS_ADDW: '+', ARM_INS_SUB: '-', ARM_INS_ORR: '|', ARM_INS_AND: '&', ARM_INS_EOR: '^', ARM_INS_UDIV: '/', ARM_INS_SDIV: '/', ARM_INS_MUL: '', ARM_INS_UMULL: '', ARM_INS_SMULL: '*'}` `module-attribute` ¶

`ARM_SHIFT_INSTRUCTIONS = {ARM_INS_ASR: '>>s', ARM_INS_LSR: '>>', ARM_INS_LSL: '<<'}` `module-attribute` ¶

`ARM_SINGLE_LOAD_INSTRUCTIONS = {ARM_INS_LDRB: 1, ARM_INS_LDRSB: -1, ARM_INS_LDRH: 2, ARM_INS_LDRSH: -2, ARM_INS_LDR: 4, ARM_INS_LDRBT: 1, ARM_INS_LDRSBT: -1, ARM_INS_LDRHT: 2, ARM_INS_LDRSHT: -2, ARM_INS_LDRT: 4, ARM_INS_LDREXB: 1, ARM_INS_LDREXH: 2, ARM_INS_LDREX: 4}` `module-attribute` ¶

`ARM_SINGLE_STORE_INSTRUCTIONS = {ARM_INS_STRB: 1, ARM_INS_STRH: 2, ARM_INS_STR: 4, ARM_INS_STRBT: 1, ARM_INS_STRHT: 2, ARM_INS_STRT: 4}` `module-attribute` ¶

`assistant = DisassemblyAssistant('armcm', 'xpsr')` `module-attribute` ¶

`DisassemblyAssistant` ¶

Bases: DisassemblyAssistant

annotation_handlers: Dict[int, Callable[[PwndbgInstruction, Emulator], None]] = {ARM_INS_MOV: self._common_move_annotator, ARM_INS_MOVW: self._common_move_annotator, ARM_INS_MOVT: self._common_generic_register_destination, ARM_INS_MVN: self._common_generic_register_destination, ARM_INS_CMP: self._common_cmp_annotator_builder(flags_reg, '-'), ARM_INS_CMN: self._common_cmp_annotator_builder(flags_reg, '+'), ARM_INS_TST: self._common_cmp_annotator_builder(flags_reg, '&'), ARM_INS_TEQ: self._common_cmp_annotator_builder(flags_reg, '^')} `instance-attribute` ¶

`flags_reg = flags_reg` `instance-attribute` ¶

`init(architecture, flags_reg)` ¶

`read_thumb_bit(instruction, emu)` ¶

`first_op_is_pc(i)` ¶

`ops_contain_pc(i)` ¶